ATLAS Front-End Electronics
Roof Board for Outer module
o Overview
o Tension-plate
o Stamp-card
v Roof Board
oInner module
oMiddle module
vOuter module
vPS plots
oIGES files
oGerber Files
oMGC Design
oPictures
o Chip Development
o Prototype boards
o Software
o Glossary and Index
 
 
o Links
Updated 981111 18.20.

This is only a half-finished preliminary design mostly for an overview of current status.
A3 plots are 1:1 scale, the others are 'fill page'.

rboutl1.ps Top layer, signal traces.
rboutl1_a3.ps Top layer, signal traces, size A3 scale 1:1.
rboutl2.ps 1st signal inner-layer, signal traces.
rboutl2_a3.ps 1st signal inner-layer, signal traces, size A3 scale 1:1.
rboutl3.ps 2nd signal inner-layer, signal traces.
rboutl3_a3.ps 2nd signal inner-layer, signal traces, size A3 scale 1:1.
rboutl4.ps Bottom layer, signal traces.
rboutl4_a3.ps Bottom layer, signal traces, size A3 scale 1:1.
rboutl1-4.eps All signal layers simultaneously, color. Seen from top layer.
rboutl4-1.eps All signal layers simultaneously, color. Seen from bottom layer.
roof_left.ps Schematic of lower roof-half (1 of 2).
roof_right.ps Schematic of upper roof-half (2 of 2).
ATLAS
©1998 Particle Physics Department, Lund University
Comments to: Lund Electronics group, bjorn@quark.lu.se