ATLAS-TRT Front-End Electronics
Middle Tension-plate
IGES Files
o Overview
v Tension-plate
oInner Tension-plate
vMiddle Tension-plate
oPS plots
vIGES files
Layer files
oGerber Files
oMGC Design
oOuter Tension-plate
o Stamp-card
o Roof Board
o Chip Development
o Prototype boards
o Software
o Glossary and Index
o Links Design files and required extra files, compressed format. Preliminary design, module 2 #0 Final design, module #2, version 1.0 Final design, module #2, version 1.1 991212 - final version, no protection resistors, no HV-group, no rotated DB's.
©1999 Particle Physics Department, Lund University
Comments to: Lund Electronics group,