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Cost

 
Figure 1: Signal timing  

 
Figure 2: FASTBUS card logic  

 
Figure 3: FADC hardware logic  

 
Figure 4: FADC readout logic  

 
Figure 5: Data format in DELPHI data stream  

 
Figure 6: VSAT data format in data stream  



Ulf Mjoernmark
Fri Apr 21 14:33:36 METDST 1995