20160209
========

testadapter carrier PGA socket.
Chip mounted
Pins mounted

20160210
========

Plots of data with pga packaged chip and carrier in PGA socket can be found at:

http://www.hep.lu.se/eudet/pictures/adapter20160209/


One bit is always set in data: BD01 - showed no connection at diod test

At startup did bit BD15 and BD13 always stay on.
After a while BD15 got working.
After another while BD13 got working.
After that only BD01 is always on.

After those whiles BD01 is the only error found when doing a register tests.

Tried to take data with pga and the carrier.
PGA works.
Carrier has the problem with BD01.

Half of the channels can be unpacked in the carrier data,
in this test those channels with BD01 = 1 (i.e. 2,3,6,7,10,11,14,15).

Histograms with pga packaged chip
-------------------------------
pga-ph-*.png pulseheights
pga-time-*.png time sweep

Histograms with carrier chip
--------------------------
carrier-ph-*.png pulseheights
carrier-time-*.png time sweep


20160210
========

What I remember I did is:

Tried after lunch to test readout
by using the pedestal memory as data.

Did not work with carrier:
can not read back what is written in pedestal memory

Replace with PGA packaged chip.
Result:
can not read back what is written in pedestal memory
but can take data with pedestal memory content as data

Replace with carrier.
To start with does behave unreliable, sometimes
the register test fail with wrong value read back.
After a while it does not answer at all.

Remove it and measured connections again.
Changes from previous measurement:
BD01 - OK (was bad before)
BD12 - no connection (had a nonstandard value before)
readout clock: 0.8V instead of 0.4.
Chipaddress 5: no connection (was OK before).

All other are OK.
also those other signals that showed nonstandard values
at first measurement are OK.

20160211
========
Remeasure on carrier:
same result as yesterday.

Compared currents drawn between carrier and PGA:
they behave identical for all settings of clocks.
The carrier do still not answer.
The only way to get the PGA not to answer is to disable the
readout clock or sampling clock.

Note 1:
Realized that all recent tests has been done with 10Mhz
sampling clock.
Switched to 20 Mhz.
PGA do not always respond. This has been working before.
carrier never respond.
No change in currents.
5 Mhz clock works with PGA packeged chip.
carrier never respond.
No change in currents.

Note 2:
BD01 which previously showed no connection and then good connection is
the one that Lennart measured after receiving carrier 5 to Lund
to have a nonstandard value (0.9V instead of 0.42V).

20160212
========

Remeasure diodtest on carrier:

readout clock has no connection, as
well as many other of BD12-BD24.
Gentle push on carrier (on glob), give connections
on some, e.g. readout clock.
releasing push give back no connection.
After that all BD12-B24, readout clock have no connection.
The push must have made it worse.
Chip address 5 still always bad.

All these signals (except chip address 5)
are physically close on both chip and carrier BGA.
(Note: pins with same ground and same power are connected together
on the adapter. Can therefore not check 
individual ground/power connections)

No other signals were found to be bad.

20160223
========
Board sent to Note to be investigated/rewarmed.

20160316
========
Board is back in Lund.

20160317
========
The adapter has been rewarmed at Note:

BD01: still bad
BD12-BD15: still bad
BD16-BD18: now OK
BD19: still bad
BD20-BD21: now OK
BD22: still bad
BD23-BD24: now OK
ChipAdd5: now OK
ReadOutClock: now OK


20160318
========
After having laid the adapter (not placed in the socket) on the testboard
and taken a picture I remeasured all signals.

http://www.hep.lu.se/eudet/pictures/carrier2pga/IMG_3069.JPG

BD01: still bad
BD11: now bad !!
BD12-BD15: still bad
BD16-BD18: now OK
BD19: still bad
BD20-BD21: now OK
BD22: still bad
BD23-BD24: now OK
ChipAdd5: now OK
ReadOutClock: now bad !!!!

Why the readoutclock is bad now I do not know.
It is important, without readoutclock does it not work.

Tested anyway it in the testsetup.
No contact with the chip.

Pictures with location of bad signals:
before sent back to Note: carrier-bottom-problematic.png
after return: carrier-bottom-problematic-20160321.png