#!/bin/bash
#./mkmcmtester-test.sh 0 0 0 1008 0 100 1
#
# inputs:
# 1 mcm
# 2 gain
# 3 shaper
# 4 samples
# 5 channels
# 6 events
mcmnb=00
source=0
polarity=1
mydir=/home/jum/wdir/ilcdaq/root/files
mydata=/home/jum/wdir/ilcdaq/data
bindir=/home/jum/ilc/ilcdaq/chiptests
#edge="u7u9"
#edge="u11u13"
#edge="2.2nF"
# ADC CLKDIV
#2 bits. Used to select which clock to use as adc_clk...
#00-" 0 = div by 2 (20 MHz)" Current: 0.367A, 3.05A
#01-" 1 = div by 4 (10 MHz)" Current: 0.258A, 2.9A
#10-" 2 = div by 8 ( 5 MHz)" Current: 0.203A,2.84A
#11-" 3 = div by 1 (40 MHz)"
clkdiv=0
#
mcm=$1
gain=$2
shaper=$3
events=$6
source=$7
shutdown=0
# input 1 - gain 2 - shaper
# Read same number of samples and channels from all 8 chips
# samples is in decimal
# "channels" are a 16-bit bitmap in hex, 0 is an active channel
samples=`printf '%x' $4`
samples=$4
channels=$5
shift1=`printf '%x' ${samples}`
shift2=`printf '%x' $((samples + 0x400))`
shift3=`printf '%x' $((samples + 0x800))`
shift4=`printf '%x' $((samples + 0xC00))`
echo $shift1
echo $shift2
echo $shift3
echo $shift4
traceid=`${bindir}/mcmdumpregs --fec $1 | grep TRACEID0 | cut -f 4 -d ' '`
${bindir}/mcmwrreg --fec $1 --register 1 --write --value $clkdiv
mode=0
#pedestal=0
#threshold=0
#pedestal=50
#threshold=150
ped=0
#ped=50
#ped=100
pedestal=`printf '%x' ${ped}`
thr=0
#thr=150
#thr=100
threshold=`printf '%x' ${thr}`
post=$((7 << 14))
pre=$((3 << 17))
#above=$((0 << 12))
above=$((1 << 12))
#
echo "" >> $mydir/readme.txt
date >> $mydir/readme.txt
echo "=====" >> $mydir/readme.txt
echo "MKPEDESTAL-ALL  MCM $1 GAIN $2 SHAPER $3 SAMPLES $4 CHANNELS $5" >> $mydir/readme.txt
#

#
# set readout mode of SALTRO chip
#================================
# Load DPCFG with mode = f(t) - fpd = 10,  postsamples (0-7), presamples (0-3), above threshold (0-3)
# To set back to normal mode mode=0.
value=`printf '%x' $((mode + post + pre + above))`
for fec in {0..0}
do
${bindir}/saltrowrrdreg --bcast --fec $fec --chip 0 --register B --channel 0 --write $value --verify
${bindir}/saltrowrrdreg --bcast --fec $fec --chip 1 --register B --channel 0 --write $value --verify
${bindir}/saltrowrrdreg --bcast --fec $fec --chip 2 --register B --channel 0 --write $value --verify
${bindir}/saltrowrrdreg --bcast --fec $fec --chip 3 --register B --channel 0 --write $value --verify
${bindir}/saltrowrrdreg --bcast --fec $fec --chip 4 --register B --channel 0 --write $value --verify
${bindir}/saltrowrrdreg --bcast --fec $fec --chip 5 --register B --channel 0 --write $value --verify
${bindir}/saltrowrrdreg --bcast --fec $fec --chip 6 --register B --channel 0 --write $value --verify
${bindir}/saltrowrrdreg --bcast --fec $fec --chip 7 --register B --channel 0 --write $value --verify
for ch in {0..15}; do
    ${bindir}/saltrowrrdreg  --fec $fec  --chip 0 --register 13 --channel $ch --write $pedestal --verify
    ${bindir}/saltrowrrdreg  --fec $fec  --chip 1 --register 13 --channel $ch --write $pedestal --verify
    ${bindir}/saltrowrrdreg  --fec $fec  --chip 2 --register 13 --channel $ch --write $pedestal --verify
    ${bindir}/saltrowrrdreg  --fec $fec  --chip 3 --register 13 --channel $ch --write $pedestal --verify
    ${bindir}/saltrowrrdreg  --fec $fec  --chip 4 --register 13 --channel $ch --write $pedestal --verify
    ${bindir}/saltrowrrdreg  --fec $fec  --chip 5 --register 13 --channel $ch --write $pedestal --verify
    ${bindir}/saltrowrrdreg  --fec $fec  --chip 6 --register 13 --channel $ch --write $pedestal --verify
    ${bindir}/saltrowrrdreg  --fec $fec  --chip 7 --register 13 --channel $ch --write $pedestal --verify
    ${bindir}/saltrowrrdreg  --fec $fec --chip 0 --register 8 --channel $ch --write $threshold --verify
    ${bindir}/saltrowrrdreg  --fec $fec --chip 1 --register 8 --channel $ch --write $threshold --verify
    ${bindir}/saltrowrrdreg  --fec $fec --chip 2 --register 8 --channel $ch --write $threshold --verify
    ${bindir}/saltrowrrdreg  --fec $fec --chip 3 --register 8 --channel $ch --write $threshold --verify
    ${bindir}/saltrowrrdreg  --fec $fec --chip 4 --register 8 --channel $ch --write $threshold --verify
    ${bindir}/saltrowrrdreg  --fec $fec --chip 5 --register 8 --channel $ch --write $threshold --verify
    ${bindir}/saltrowrrdreg  --fec $fec --chip 6 --register 8 --channel $ch --write $threshold --verify
    ${bindir}/saltrowrrdreg  --fec $fec --chip 7 --register 8 --channel $ch --write $threshold --verify
done
done

for fec in {0..0}
do
  for register in {10..17}
  do
    ${bindir}/mcmwrreg --fec $fec --register $register --write --value FFFF
  done
  
  ${bindir}/saltrowrrdreg --fec $fec --chip 0 --register A --channel 0 --write $shift1 --verify
  ${bindir}/saltrowrrdreg --fec $fec --chip 1 --register A --channel 0 --write $shift2 --verify
  ${bindir}/saltrowrrdreg --fec $fec --chip 2 --register A --channel 0 --write $shift3 --verify
  ${bindir}/saltrowrrdreg --fec $fec --chip 3 --register A --channel 0 --write $shift4 --verify
  ${bindir}/saltrowrrdreg --fec $fec --chip 4 --register A --channel 0 --write $shift1 --verify
  ${bindir}/saltrowrrdreg --fec $fec --chip 5 --register A --channel 0 --write $shift2 --verify
  ${bindir}/saltrowrrdreg --fec $fec --chip 6 --register A --channel 0 --write $shift3 --verify
  ${bindir}/saltrowrrdreg --fec $fec --chip 7 --register A --channel 0 --write $shift4 --verify
  
  for chip in {0..7}
  do
    mcmregister=`printf '%x' $((0x10 + $chip))`
    ${bindir}/mcmwrreg --fec $fec --register $mcmregister --write --value $channels
  done
#  ${bindir}/mcmpca16 --fec $fec --preamp 0 --gain ${gain} --shaper ${shaper} --shutdown $shutdown --polarity $polarity --write --verify
done
${bindir}/mcmpca16 --fec $fec --preamp 0 --gain ${gain} --shaper ${shaper} --shutdown $shutdown --polarity $polarity --biasctrl 1 --grst 1 --write --verify
date > temp-shift.out
${bindir}/mcmdumpregs --fec $1 >> temp-shift.out
testrig/testcard --mcmtemp 2 --csvfile mcmtemp-run.csv
testrig/testcard --readadc 2 --csvfile readadc-run.csv
time ${bindir}/srureadout --fec 0  --data=${mydata}/readout.dat --rate 100 --event $events --softtrigger --sruif $SRUIF > slask.out
#time ${bindir}/srureadout --fec 0  --rate 5 --event $events --softtrigger --sruif $SRUIF > slask.out
date >> temp-shift.out
testrig/testcard --mcmtemp 3 --csvfile mcmtemp-run.csv
testrig/testcard --readadc 3 --csvfile readadc-run.csv
${bindir}/sruunpack --data ${mydata}/readout.dat --root
${bindir}/mcmpca16 --fec $fec --preamp 0 --gain 0 --shaper 0 --shutdown 1 --polarity $polarity --biasctrl 0 --grst 1 --write --verify
#time ./srureadout --fec 0 --fec 1 --rate 0 --data=${mydata}readout --event $events --sruif enp3s0
#time ./srureadout --fec 0 --fec 1 --rate 0 --data=${mydata}readout --event $events --softtrigger --sruif enp3s0
#time ./srureadout-dev --fec 0 --fec 1 --rate 0 --data=${mydata}readout --event $events --softtrigger
#time ./srureadout-dev --fec 0 --fec 1 --rate 0 --event $events --softtrigger

#samples=`printf '%x' 1000`
#./altrowrrdreg --fec 1 --chip 0 --register A --channel 0 --write $samples --verify
#./altrowrrdreg --fec 1 --chip 1 --register A --channel 0 --write $samples --verify
#./altrowrrdreg --fec 1 --chip 2 --register A --channel 0 --write $samples --verify
#./altrowrrdreg --fec 1 --chip 3 --register A --channel 0 --write $samples --verify
#./altrowrrdreg --fec 1 --chip 4 --register A --channel 0 --write $samples --verify
#./altrowrrdreg --fec 1 --chip 5 --register A --channel 0 --write $samples --verify
#./altrowrrdreg --fec 1 --chip 6 --register A --channel 0 --write $samples --verify
#./altrowrrdreg --fec 1 --chip 7 --register A --channel 0 --write $samples --verify

#time ./srureadout --fec 1 --rate 0 --data=${mydata}readout --event $events --softtrigger >/dev/null
#time ./srureadout --fec 1 --rate 0 --event $events --softtrigger >/dev/null
#cp -a ${mydata}readout.root ${mydata}readout-zsup-s${source}.root
cp -a ${mydata}/readout.root ${mydata}/mcmtests/mcm${mcmnb}/mcm${mcmnb}-${traceid}-clk${clkdiv}-ped${ped}-thr${thr}-g${gain}-s${shaper}-p${polarity}-s${source}.root
cp -a ${mydata}/readout.dat ${mydata}/mcmtests/mcm${mcmnb}/mcm${mcmnb}-${traceid}-clk${clkdiv}-ped${ped}-thr${thr}-g${gain}-s${shaper}-p${polarity}-s${source}.dat