For chip summary see end of file. 20230104 ======== Open sealed chips: 3 full trays + 1 not full tray (row x columns: 9x21 chip trays). 3x9x21 + 12x9+7 = 567 + 115 = 682 chips in total. Tests below are in order of time as well. TRAY1 ===== column1 ------- 4618899 OK, stored as 4618899-0, retested after 4618898 still OK 4618897 channel 7: low signal seen. Bit 9 missing. (test for 0%,100%) 4618904 OK 4618908 OK 4618912 OK (different error bits for pedsub with and w/o shaper) 4618916 OK 4618920 OK 4618902 channel 1 no signal (bits 7,8,9 = 0) - low rms on pedestals 4618906 low current, reinsert chip. OK, but bits 6-9 bad. no signal channel 2,3; low signal on other channels. column2 ------- 4618898 no current, reinsert no current. 4618914 bad channels bits 2,3; low signal on other pulses. current when LV switched on as if SALTRO is on. 4618903 errorrs with ramp for channel 0, pattern 2 (rampdown) 4618907 polarity=0 as if polarity=1. peak1 pedsub-g0-s0-p1 = 620, normal 500. peak1 pedsub-g1-s0-p1 = 680, normal 460. peak1 pedsub-g2-s0-p1 = 620, normal 600. peak1 pedsub-g3-s0-p1 = 670, normal 660. => gain0,1 has higher pulses than normal. 4618911 no current retest chip 1918040 from other batch. OK, named as chip0000040 chips 4618899 and 1918040 where retested to check if insertion in socket was a problem. They were tested OK. reasons for error: problem in inserting chip in socket? chip problems? 20230109 ======== retest of column2 -------------- 4618898 no current, reinsert no current. 4618914 OK 4618903 errorrs with ramp for channel 0, pattern 2 (rampdown) 4618907 OK 4618911 no current 4618915 low pulses 4618919 no current 4618901 low pulses 4618905 low pulses Find that pulsegeneratoradapter is rather loose. Put it back and retest: 4618905 OK 4618901 channel 1 nosiy, high-low problem? 4618915 OK column3 ---- 4618910 currents when power on but saltro is off, else OK. currents fine when setting power "by hand" and not by testprogram. Should also retest lowpulse chips in column1: 4618897, 4618902, 4618906 20230112 ======== continue column3 ---------------- 4618913 OK 4618918 OK 4618922 OK 4618924 Bad peak recognition 4618926 Ch 116 no peak1, noisy. 4618930 OK 4618932 OK 4618936 no current 1.5V can not access CPLD. currents when power on but saltro is off, seems to be after "no current 1.5V" chip being ended with close.sh. column4 ------- 4618909 OK 4618928 OK 4618917 OK 4618921 OK 4618923 ch1 high rms, high-low? 4618925 ch11 noisy, high-low? 4618929 no current 1.5V 4618931 bad peak recognition 4618935 OK between 921 and 923, retest of 897,906. same errors as previuosly. should recheck: 4618924 Bad peak recognition 4618931 bad peak recognition 20230116 ======== column5 ------- 4618934 no current 1.5V 4618940 OK 4618944 no current 1.5V Can read CPLD but can not set any register in CPLD 4618942 OK 4618948 ch 13 no pulses in 4618946 OK (but check g3-s7-o1-sh) 4618952 ch 0,3,6,8 low-high 4618950 OK 4618956 ch 8 low-high column6 ------- 4618933 OK (but check zerosup-g3-s3-p1-s2) 4618939 ch 15: low-high low pulses, escpecially on ch 15. errors to be checked (low-hih? bits missing?) 4618943 too high current > 1A 4618941 errors: ch13 low-high. 4618947 errors: ch1 no pulses seen 4618959 no current 1.5V 4618951 test1: strange pulses. reinsert for test2: OK (but check g3-s7-p1-sh) 4618949 no current 1.5V. Reinsert: same. 4618955 OK Visually inspect chip with "no current 1.5V" in microscope. Seems OK. Measure on pasactrl lines: set as CPLD startup settings. Can not change the settings: write new value, reads back default values. 2023019 ------- Jag har mätt lite på de chip som inte drar någon ström (9st) och några fungerande. 1. På ett fungerande chip är det kontakt mellan GndPasaA,GndAdcA, GndAdcDig..... Vilket vi mätt tidigare. På icke fungerande är där ingen kontakt mellan dem. Är de olika jordplanen på chipkretskortet förbunda? Om inte är det då på SALTROn, eller? 2. På fungerande chip är värdet 0.4 mellan jord (GndPasaA) och signalingångsbollarna (vilket mätts många gånger) när man mäter över skyddsdioden. På icke fungerande är värdet över skalan på mätaren. 3. Jag har mätt på några ännu otestede chips (kolumn7). På ett av dem är det samma resultat som för ett icke fungerande chip. Har inte testat dem. På några av de testade chipsen sågs inga signaler in på en eller flera ingångar, eller låga signaler. Mätt på chippen också på några av dem och såg inga fel. Tyder på att kontakten i sockeln inte var den bästa. SUMMARY ======= After some chips being retested as written in log. column1 ---- 4618899 OK 4618897 channel 7: low signal seen. Bit 9 missing. (retested) 4618904 OK 4618908 OK 4618912 OK 4618916 OK 4618920 OK 4618902 channel 1 no signal (bits 7,8,9 = 0) - low rms on pedestals 4618906 low current, reinsert chip. OK, but bits 6-9 bad. (retested) no signal channel 2,3; low signal on other channels. column2 ---- 4618898 no current, reinsert no current. 4618914 OK 4618903 errorrs with ramp for channel 0, pattern 2 (rampdown) 4618907 OK 4618911 no current on 1.5V 4618915 OK 4618919 no current on 1.5V 4618901 channel 1 nosiy, high-low problem. 4618905 OK column3 ---- 4618910 OK currents when power on but saltro is off. currents fine when setting power "by hand" and not by testprogram. 4618913 OK 4618918 OK 4618922 OK 4618924 Bad peak recognition, to be checked low signals in bittest. 0-700 in ADCs. 4618926 Ch 4 nosiy (g1=30 in ADCc) high (g1=60 in ADC), for gain > 12mV/fC . 4618930 OK 4618932 OK 4618936 no current 1.5V can not access CPLD. column4 ------- 4618909 OK 4618928 OK 4618917 OK 4618921 OK 4618923 ch1 high rms, high-low. 4618925 ch11 noisy, high-low. 4618929 no current 1.5V. 4618931 bad peak recognition. To be checked. polarity0 looks like polarity1 in baseline (see also 4618907) low signals in bittest. 0-700 in ADCs. 4618935 OK column5 ------- 4618934 no current 1.5V 4618940 OK 4618944 no current 1.5V Can read CPLD but can not set any register in CPLD 4618942 OK 4618948 ch 13 no pulses in 4618946 OK (but check g3-s7-o1-sh) 4618952 ch 0,3,6,8 low-high 4618950 OK 4618956 ch 8 low-high column6 ------- 4618933 OK (but check zerosup-g3-s3-p1-s2) 4618939 errors to be checked ch 15: low-high low pulses, escpecially on ch 16. To be retested. 4618943 too high current > 1A 4618941 errors: ch13 low-high. 4618947 errors: ch1 no pulses seen 4618959 no current 1.5V 4618951 test1: strange pulses. reinsert for test2: OK (but check g3-s7-p1-sh) 4618949 no current 1.5V. Reinsert: same. 4618955 OK TRAY2 ===== 20230123 -------- Anders have made the pulseadaptern more robust. This made the signals to have slighlty other pulseheights. New limits to be found since many inputs were outside old limits. TO BE DONE - DONE 20230126 column1 ------- 4618515 OK 4618518 OK 4618524 ch 15:pedestal=1023 ch 14: pedestal=0 at g3 and low else (short with ch 15?) 4618522 OK 4618526 OK 4618528 ch 12: ramp1,ramp2 error -> bad signals 4618531 ch0: missing in 1 event register DPCFG: errors 4618536 OK 4618529 OK column2 ------- 4618519 OK 4618517 OK 4618523 OK 4618521 OK (ch X g3-low pedestal?) 4618525 OK (ch11 g3-low pedestal?) 4618527 OK 4618530 OK 4618535 OK (have few peak0 - low pulses?) 4618539 OK column3 ------- 4618534 OK 4618538 OK 4618544 OK (have many peak0 entries - few peak2 low pulses?) 4618548 OK (have many peak0 entries - few peak2 low pulses?) 4618552 OK 4618556 ch9: low-high (have many peak0 entries - few peak2 low pulses?) 4618554 ch6: slight low-high ch10: low-high, no peak1 4618545 OK 4618559 g3: very noisy pedestals pedsub g3: no peak2 bittest: low pulses <700 ADCs. Not fully analyzed. 20230126 -------- Anders made the pulseadapter connection more secure. => lower pulse heigths for pg source2. Modified pulse height limits accordingly. column4 ------- 4618533 OK 4618537 OK 4618543 low pulses, reinsert the same 4618547 OK 4618551 OK 4618555 ch2: ramp1,ramp2 <300 ADCs fluctuating, also in data. analysis program crash. 4618553 ch0,2: ramp1,ramp2 errors, also in data. analysis program crash/hangs. 4618549 OK 4618558 OK (g3-s0 one channel high pedestal, check it). 20230130 -------- Ulf & Anders column5 ------- 4618557 OK 4618564 high pedestal, peaktype outside pedestal is increasing by channel number ch0-5: 110-> ch15:450 4618568 OK one pedestal g3-s0: rms = 3.0 4618566 OK 4618572 OK 4618570 ch 9: missing in data 4618576 OK 4618574 OK 4618578 OK column6 ------- 4618562 ch 4: ramp errors, also in data 4618563 low pulses 4618567 OK 4618565 ch 3: ramp error, also in data 4618571 OK ch3: g3-s0 rms = 3.0 4618569 ch 14: data corrupt (as if using 8 event buffers??) 4618575 OK 4618573 OK 4618577 regtest L1: ch 11 errors column7 ------- 4618584 pedestals: g0,g1,g2-s0 - wavy events 4618579 low pulses 4618582 OK 4618586 OK 4618590 OK 4618598 OK 4618592 OK 4618596 ch 12: ramp error, also in data 4618600 OK 20230203 -------- Anders &Ulf column8 ------- 4618583 sporadic no answer 4618587 OK (check bits, OK) 4618581 OK (check bits, OK) 4618585 zerosup: analysis program crash 4618589 OK (check bits,OK) 4618597 OK 4618604 regtest DPCFG: 2 errors 4618595 OK 4618599 zerosup: analysis program hang (g3-s3-p1-s1-sh.root) Note: modified bug in bittest output in csvmain.c after 4618589 column9 ------- 4618608 OK 4618606 OK 4618610 OK 4618612 OK (check pedestal mean, OK) 4618616 OK 4618614 OK 4618603 gain3: high rms on pedestals 4618620 OK 4618618 zerosup: analysis program hangs (g1-s0-p1-s2.root) column10 -------- 4618607 low pulses, peaktypes and bit pulses low 4618605 OK (check pedestal rms outside limit, g3-s0-p1 6 channels slight > 2.5) 4618609 OK 4618611 OK 4618615 OK 4618613 OK 4618624 OK? check power otside limit A1,5V 88mV before power SALTRO normal is 40mV, which it is after power off. 4618619 OK 4618617 ch1: no pulse in 20230207 -------- Ulf column11 -------- 4618622 ch7: ramp1,2 4618626 OK 4618630 OK 4618632 OK 4618635 OK 4618640 pedsub: no peak2, low peak1. (timing wrong?) 4618638 OK 4618724 OK 4618722 OK column12 -------- 4618621 OK pedestal outside limit (g1:>110-115),g2:ca 100,g3:ca 100) 4618625 OK 4618629 OK 4618627 OK 4618634 OK 4618639 OK 4618637 OK 4618723 OK 4618721 OK 20230209 -------- Anders & Ulf column13 -------- 4618727 OK 4618732 OK 4618730 OK (Bittest 8) 4618734 OK 4618736 OK 4618740 OK 4618738 ch8: pedestal rms (noisy) 4618744 Overcurrent 4618742 OK (current high after power on, mistake after previous chip. use init.sh 0 then OK) column14 -------- 4618725 OK 4618731 OK 4618729 OK ch10: pedestal a bit high (g1:113) 4618733 OK 4618735 OK 4618739 OK 4618748 1.5V low current 252mV, (then I2C bus collisions) 4618743 OK ch12: pedestal g3 a bit high (ca 96) 4618741 OK column15 -------- 4618746 OK ch6: pedestal mean a bit low 4618752 OK 4618750 OK 4618754 OK 4618758 OK 4618756 ch 0: ramp1,2 < 50 in ADC,pedsub,zsup, bittest: only bit3&4 set, pedestal 4618760 OK 4618764 OK but ch 5: pedestal bit low, peaktype1 outside limit 4618767 OK column16 -------- 4618745 OK pedestal rms ch 8 4618751 OK 4618749 ch4: ramp1,2 errors 4618753 OK 4618757 OK ch6: pedestal rms g3 slight high 4618755 OK ch6: pedestal rms g3 slight high 4618759 OK ch6: pedestal rms g3 slight high 4618763 OK ch6: pedestal rms g3 slight high 4618766 ch3: bittest 8,9, very large low-high ch6: pedestal rms g3 slight high 20230214 -------- Anders & Ulf column17 -------- 4618772 OK 4618761 OK 4618769 ch 14: ramp1,2 4618775 ch 11: ramp1, pedestal rms outside limit (ca 8) 4618779 OK 4618773 OK 4618780 OK 4618783 ch 0: pedestal g2, unexpected entries 4618787 ch 1: bittest bit 7,8,9 missing; pedsub,zerosup: no signal in. column18 -------- 4618768 OK 4618765 ch 8: regtest; ZSTHR 1 error 4618776 high current 4618774 OK 4618778 high current 4618777 OK 4618785 OK (ch2: g2,g3 pedestal rms slight outside limit) 4618782 OK 4618786 ch 14: ramp1,2; pedestal rms high (ca 4). column19 -------- 4618792 ch 13: pedestal rms high (high-low) ch 13: pedsub,zerosup, bittest1,9 (due to high low) 4618796 OK 4618794 ch 0:pedestal unexpectes entries, regtest: B2THR,DPCFG, TRCFG, ZSTHR,ret2, unavailable 4618800 ramp1: channels missing, ch0-6: errors ramp2: errors in all channels 4618798 OK 4618884 low pulses in. pedestal, pedsub,zsup,bittest8,9 4618882 zerosup, analysis hangs g2-s0-p1-s2.root 4618888 ch 0: pedestal rms (high-low) 4618892 ch 1: bittest7,8,9 no signal in low pulses ch 3: polarity = 0: pedestal = 50 (should be 800), high-low? column20 -------- 4618791 ch7: pedestal rms slight high ch11: pedsub,zsup bittest 6,7,8,9; no signal in ch15: pedsub,zsup bittest 7,8,9; no signal in 4618795 OK 20230217 -------- Anders & Ulf column20 (forts) -------- 4618793 OK (ch3,4,5 pedestal rms g2,g3 2.3-3.5) 4618799 OK 4618797 OK 4618883 ch 14: ramp1,2; zerosup segment violation 4618881 high current 4618887 ch 15: zerosup,bittest 6,7,8,9; (no signal in) 4618891 analysis hangs in zsup: g0-s0-p1-s1.root column21 -------- 4618790 OK 4618885 pedsub,zerosup; peak2>peak1 (timing?) 4618890 OK (ch 14: pedestal limit slight low 4618889 OK (segment violation?) 4618895 OK 4618896 analysis hangs zeosup g3-s0-p1-s2-sh.root 4618893 ch 4: ramp1,2 4618894 OK 4618900 OK ch1-8 pedestal rms ca 2-4 SUMMARY ======= TRAY1 ----- 28 OK columns: 6+4+6+5+4+3 9 no current on 1.5V 1 too high current > 1.0A 1 ramp error 2 signal problems also when retested - to be understood 4618897,4618906 6 signal problems - to be rechecked/understood (sw/hw) 4618902, 4618931,4618924,4618947,4618948,4618939 (also ch 15: low-high) 7 low-high problem -- 54 tested TRAY2 ----- 131 OK (few to be checked) 14 ramp errors, some data also. 5 pedestal error 5 register error 4 low-high 7 low pulses 1 missing channel 1 corrupt channel 6 zerosup analyis program crash/hang 1 sporadic no answer 4 no pulse in on channel 1 pedsub: no peak2, low peak1 4 high current 1 low current ( 1.5V low=252mA) 1 ramp1,2 < 50 in ADC ch0, bittest: only bit3&4 set, 1 bittest 8,9, very large low-high (ch3) 1 peak timing? 1 unexpected entries -- 189 tested (columns 1-21)