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| Device Utilization Summary | [-] |
| Slice Logic Utilization | Used | Available | Utilization | Note(s) |
| Number of Slice Registers |
40,652 |
160,000 |
25% |
|
| Number used as Flip Flops |
40,645 |
|
|
|
| Number used as Latches |
6 |
|
|
|
| Number used as Latch-thrus |
0 |
|
|
|
| Number used as AND/OR logics |
1 |
|
|
|
| Number of Slice LUTs |
38,482 |
80,000 |
48% |
|
| Number used as logic |
35,186 |
80,000 |
43% |
|
| Number using O6 output only |
23,925 |
|
|
|
| Number using O5 output only |
2,139 |
|
|
|
| Number using O5 and O6 |
9,122 |
|
|
|
| Number used as ROM |
0 |
|
|
|
| Number used as Memory |
1,977 |
27,840 |
7% |
|
| Number used as Dual Port RAM |
1,144 |
|
|
|
| Number using O6 output only |
1,088 |
|
|
|
| Number using O5 output only |
2 |
|
|
|
| Number using O5 and O6 |
54 |
|
|
|
| Number used as Single Port RAM |
0 |
|
|
|
| Number used as Shift Register |
833 |
|
|
|
| Number using O6 output only |
437 |
|
|
|
| Number using O5 output only |
0 |
|
|
|
| Number using O5 and O6 |
396 |
|
|
|
| Number used exclusively as route-thrus |
1,319 |
|
|
|
| Number with same-slice register load |
1,064 |
|
|
|
| Number with same-slice carry load |
255 |
|
|
|
| Number with other load |
0 |
|
|
|
| Number of occupied Slices |
14,348 |
20,000 |
71% |
|
| Number of LUT Flip Flop pairs used |
45,288 |
|
|
|
| Number with an unused Flip Flop |
10,722 |
45,288 |
23% |
|
| Number with an unused LUT |
6,806 |
45,288 |
15% |
|
| Number of fully used LUT-FF pairs |
27,760 |
45,288 |
61% |
|
| Number of unique control sets |
1,629 |
|
|
|
Number of slice register sites lost
to control set restrictions |
5,954 |
160,000 |
3% |
|
| Number of bonded IOBs |
415 |
600 |
69% |
|
| Number of LOCed IOBs |
415 |
415 |
100% |
|
| IOB Flip Flops |
134 |
|
|
|
| IOB Master Pads |
81 |
|
|
|
| IOB Slave Pads |
81 |
|
|
|
| Number of bonded IPADs |
6 |
|
|
|
| Number of LOCed IPADs |
6 |
6 |
100% |
|
| Number of bonded OPADs |
4 |
|
|
|
| Number of LOCed OPADs |
4 |
4 |
100% |
|
| Number of RAMB36E1/FIFO36E1s |
172 |
264 |
65% |
|
| Number using RAMB36E1 only |
172 |
|
|
|
| Number using FIFO36E1 only |
0 |
|
|
|
| Number of RAMB18E1/FIFO18E1s |
17 |
528 |
3% |
|
| Number using RAMB18E1 only |
17 |
|
|
|
| Number using FIFO18E1 only |
0 |
|
|
|
| Number of BUFG/BUFGCTRLs |
15 |
32 |
46% |
|
| Number used as BUFGs |
14 |
|
|
|
| Number used as BUFGCTRLs |
1 |
|
|
|
| Number of ILOGICE1/ISERDESE1s |
173 |
600 |
28% |
|
| Number used as ILOGICE1s |
13 |
|
|
|
| Number used as ISERDESE1s |
160 |
|
|
|
| Number of OLOGICE1/OSERDESE1s |
123 |
600 |
20% |
|
| Number used as OLOGICE1s |
123 |
|
|
|
| Number used as OSERDESE1s |
0 |
|
|
|
| Number of BSCANs |
0 |
4 |
0% |
|
| Number of BUFHCEs |
0 |
120 |
0% |
|
| Number of BUFIODQSs |
0 |
60 |
0% |
|
| Number of BUFRs |
3 |
30 |
10% |
|
| Number of CAPTUREs |
0 |
1 |
0% |
|
| Number of DSP48E1s |
0 |
480 |
0% |
|
| Number of EFUSE_USRs |
1 |
1 |
100% |
|
| Number of FRAME_ECCs |
0 |
1 |
0% |
|
| Number of GTXE1s |
2 |
20 |
10% |
|
| Number of IBUFDS_GTXE1s |
1 |
10 |
10% |
|
| Number of ICAPs |
0 |
2 |
0% |
|
| Number of IDELAYCTRLs |
8 |
15 |
53% |
|
| Number of IODELAYE1s |
80 |
600 |
13% |
|
| Number of MMCM_ADVs |
3 |
10 |
30% |
|
| Number of PCIE_2_0s |
0 |
2 |
0% |
|
| Number of STARTUPs |
1 |
1 |
100% |
|
| Number of SYSMONs |
1 |
1 |
100% |
|
| Number of TEMAC_SINGLEs |
2 |
4 |
50% |
|
| Number of RPM macros |
1 |
|
|
|
| Average Fanout of Non-Clock Nets |
4.13 |
|
|
|